RF chip protocol

1.   RF Chip Control

The RF chip is controlled by the following 4 pins:

CHIP_REG_CLR: When 0, clear all register output to be 0.

CHIP_REG_CLK: clock.

CHIP_REG_DIN: Serial data input.

CHIP_REG_DOUT: Serial data output.

CHIP_REG_LOAD: Activate the data from the register buffer.

Connections mapping:

CHIP_REG_CLR       —        GPIO18

CHIP_REG_CLK        —        GPIO21

CHIP_REG_DIN        —        GPIO19

CHIP_REG_DOUT    —        GPIO17

CHIP_REG_LOAD     —        GPIO20

There are two modes for data transfer: (1) Write and Read; (2) Write only. The first mode is used to test the functionality of the register chain of the RF chip. The second mode is used for chip programming when the functionality if verified.

There are 86 register bits in total. Please see “SDSP RX Chip Control Bits Description”.

Mode (1): Write and Read. The input is sent twice consecutively. Read DOUT and compare the sent bits.

Mode (2): Write only.